Section 7 (if something is wrong please change/if there are good questions i have not asked add them in) Flashcards Preview

Computer Science Aqa A Level > Section 7 (if something is wrong please change/if there are good questions i have not asked add them in) > Flashcards

Flashcards in Section 7 (if something is wrong please change/if there are good questions i have not asked add them in) Deck (45)
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1

What is the Processor (also known as CPU)

A device that carries out computation on data and instructions, in order to produce an output.

2

Define Main memory

Stores data and instructions that will be used by the processor.

3

Fetch execute cycle

The continuous process of data movement between main memory and the processor during the running of a program.

4

Random access memory

Stores data and can be read to and written from, it is a temporary storage, which is quickly accessible.

5

Read only memory

Stores data and can be read from but not written to(unless it is programmable ROM) and is not volatile.

6

Data Bus

Transfers data between memory and processor(bi-directional).

7

Address Bus

Used to specify a physical address in memory so that the data bus can access it.

8

Control Bus

Controls the flow of data between the processor and other parts of the computer.(bi-directional).

9

Bus width

The number of wires in a bus.

10

Word length

The number of bits that can be addressed, manipulated or transferred as one unit.

11

Input and output controller

The processor cannot directly communicate with I/O devices therefore an interface called the I/O controller handles the flow of data between the two.

Controller also behaves as a buffer as data from I/O devices are processed slower.

12

Von Neumann architectures

A technique of building a processor that stores data and instructions in the same main memory and uses the same busses.

13

Harvard architectures

A technique of building a processor that stores data and instruction in seperate memory and uses different busses

14

What benefits are there to the two architectures.

pass

15

State the Stored Program Concept

The idea that data and instructions are stored in memory together and is fetched , decoded and executed by the processor.

16

List the components of the processor that allows for the fetch execute cycle to occur

The Control Unit
The Clock
The Arithmetic Logic Unit
Registers

17

Define Control Unit

Part of the processor that manages the execution of instructions and makes sure data is being transmitted to the correct destination.

18

Define ALU

Part of the processor that processes and manipulates data.

Also carries out arithmetic and logic calculations when the control unit sends it an opcode and operand to process.

19

Define Clock

A device that generates a signal that synchronises the components pf a computer, processor and the movement of data(MHz..millions of cycles a second)

20

Define Register

A small piece of temporary storage that is part of the processor and stores data and instructions during the fetch execute cycle

21

Name the 5 registers involved in the fetch execute cycle

Program Counter
Memory Address Register
Memory Buffer Register
Current Instruction Register
Status Register

22

Program Counter

A register that stores the address of the first or next instruction to be taken from main memory by the processor

23

MAR

A register that stores the location of address that data is either being COPIED FROM or WRITTEN TOO by the processor

24

MBR

A register that stores the data and instruction that is either being COPIED FROM or WRITTEN TOO by the processor

25

CIR

A register that stores the instruction that the processor is currently decoding or executing

26

SR

Keeps track of the computers various functions and the properties of data

27

Define the Fetch Execute Cycle

The continuous cycle of retrieval of machine code and movement of data from main memory to processor while a program is being ran.

28

Fetch

-PC set to address of first/next instruction
-Address in PC sent to the MAR
-Address of memory is transferred along the address bus into main memory
-Content of main memory is transferred through the Data Bus and stored in the MBR
-The data or instruction is stored in the CIR
-PC increments

29

Decode

-Instruction/Data held in CIR is transferred into the Control Unit(which will execute the instruction)

30

Execute

-If necessary data is fetched
-The opcode and Operands are sent to the ALU
-Result stored in the accumulator