Chapter 36

Question 1

how a logical address convert into physical address

Answer 1

There are several ways like

• Simple indexing
• Multi-level indexing
• Hashing
• TLB (translation lookaside buffer)

Question 2

What is valid and invalid bit in paging

Answer 2

One additional bit is generally attached to each entry in the page table: a valid–invalid bit. When this bit is set to valid, the associated page is in the process’s logical address space and is thus a legal (or valid) page. When the bit is set to invalid, the page is not in the process’s logical address space.

Question 3

Does segmentation could also have additional bits

Answer 3

Yes read write & execute bits

Question 4

How 2 types of protection can be implemented on segmentation level

Answer 4

1. Associate valid/invalid bit with each segment table entry to indicate if the referenced segment is part of the process address space or not.
2. Read, write and execute bits to define legal operations on a segment with 0/1 values.

Question 5

Can we do paging with external segmentation

Answer 5

Yes. Then each will have page table. This process is known as paged segmentation. The reason for paged segmentation is that segmentation sizes are increasing.

Question 6

What is level of page segmentation in intel

Answer 6

2 level

Question 7

What is TLB reach

Answer 7

How much memory TLB can cover

Question 8

What kind of 2 segments supported by Intel CPU

Answer 8

1. Local segments (accessible only for 1 process)

2. Global segments (can be shared between different processes)

Question 9

What are 2 modes in Intel CPU

Answer 9

1. Real mode

2. Protected mode