Section 3: Software Synchronization

Question 1

Define CPU latency

Answer 1

Time between the receipt of a service request and the initiation of the service. Can involve both hardware and software delays.

Question 2

Define real-time system

Answer 2

A system that guarantees a worst-case latency for critical events

Question 3

Define latency

Answer 3

The delay between the arrival of the request and the completion of service.

Question 4

What are two terms that are used in discussing system performance?

Answer 4

Latency and Throughput

Question 5

Define throughput

Answer 5

A measure of how many items can be processed per unit of time.

Question 6

Define blind cycle

Answer 6

Software waits for some amount of time Ned then acts on the data whether or not the device is ready

Question 7

Define periodic polling

Answer 7

Device status is checked after a pre-determined amount of time and this repeats until the device is done. Usually implemented with a timer interrupt.

Question 8

Define occasional polling

Answer 8

Device status is checked at the convenience of the designer

Question 9

Define tight polling loop (gadfly or busy waiting)

Answer 9

Software continually checks the I/O status, waiting for the device to be done.

Question 10

Define interrupt handling

Answer 10

Device generates a hardware interrupt to request servicing when done.

Question 11

Name 5 synchronization mechanisms

Answer 11

1. Blind cycle
2. Periodic polling
3. Occasional polling
4. Tight polling
5. Interrupt handling.

Question 12

Which 3 synchronization mechanisms are CPU-orientated?

Answer 12

1. Blind cycle
2. Periodic polling
3. Occasional polling

Synchronization is dependant primarily on CPU timing.

Question 13

List 2 synchronization mechanics that are device-orientated

Answer 13

1. Tight polling
2. Interrupt handling

Latency seen by the device is minimized.

Question 14

Explain the steps in input polling loop synchronization

Answer 14

1. Poll the device
2. Wait until data is available
3. Input the data

Question 15

Explain the steps in output polling loop synchronization

Answer 15

1. Poll the device
2. Wait until device is ready
3. Output data

Question 16

Explain the steps in interrupt synchronization

Answer 16

1. A device notifies CPU of interrupt request
2. CPU completes execution of the current instruction
3. Execution of main program is suspended
4. Interrupts are disabled
5. Some internal registers are saved (including program counter)
6. Device may be acknowledged
7. Interrupt service routine is selected
8. Interrupt service routine is executed
9. Registers are restored
10. Interrupts are enabled
11. Execution of main program resumes

Question 17

Why should interrupt service routines (ISR) execute as fast as possible?

Answer 17

Because they are interrupting other tasks

Question 18

Explain the structure of an interrupt service routine (ISR)

Answer 18

1. Save any registers modified by the ISR
2. Acknowledge the device
3. Re-enable interrupts to allow higher or same priority interrupts (design specific)
4. Test for a valid interrupt and / or determine the exact source of the interrupt
5. Complete desired action
6. Restore registers
7. Return from interrupt

Question 19

What is the difference between vectored and non-vectored interrupts?

Answer 19

Vectored interrupts have a fixed priority associated with the interrupt vector. In non-vectored interrupts, the software must determine priority and which ISR goes with each interrupt.

Question 20

Explain the steps in interrupt initialization

Answer 20

1. Disable all interrupts
2. Enable device interface interrupts by setting appropriate device interface registers
3. Set interrupt mask to allow interrupt from device
4. Initialize interrupt vector with address of ISR
5. Enable interrupts as required